[all-commits] [llvm/llvm-project] 4cd1c0: [DAG] SimplifyDemandedBits - if we're only demandi...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4cd1c0749143ce9e78a9cfe176a9fb7a5d34637f
      https://github.com/llvm/llvm-project/commit/4cd1c0749143ce9e78a9cfe176a9fb7a5d34637f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-08-18 (Fri, 18 Aug 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/VE/Scalar/umax.ll
    M llvm/test/CodeGen/VE/Scalar/umin.ll
    M llvm/test/CodeGen/X86/umax.ll
    M llvm/test/CodeGen/X86/umin.ll

  Log Message:
  -----------
  [DAG] SimplifyDemandedBits - if we're only demanding the msb, a UMIN/UMAX node can be simplified to a AND/OR node respectively.

Alive2: https://alive2.llvm.org/ce/z/qnvmc6