[all-commits] [llvm/llvm-project] c5f763: [AArch64][GISel] Fix selection of G_CONSTANT_FOLD_...
David Green via All-commits
all-commits at lists.llvm.org
Wed Aug 16 00:33:32 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: c5f763b563e37ebe26bfd4a012269482d54d0a80
https://github.com/llvm/llvm-project/commit/c5f763b563e37ebe26bfd4a012269482d54d0a80
Author: David Green <david.green at arm.com>
Date: 2023-08-16 (Wed, 16 Aug 2023)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/select-constbarrier.mir
Log Message:
-----------
[AArch64][GISel] Fix selection of G_CONSTANT_FOLD_BARRIER
As far as I understand - When lowering a G_CONSTANT_FOLD_BARRIER we replace the
DstReg with SrcReg, and need to check that the register class is equivalent
when doing so for the replacement to be legal. During lowering we could end up
visiting nodes in an odd order, leaving a G_CONSTANT_FOLD_BARRIER with a known
regclass for the src, but only a regbank for the dst. Providing the Regbank
contains the regclass, the replacement should still be safe.
This fixes an assert seen in the llvm-test-suite when lowering hoisted
constants, relaxing canReplaceReg to account for the case when the regbank
covers the regclass, so it is better able to handle differences in visiting
order.
Differential Revision: https://reviews.llvm.org/D157202
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