[all-commits] [llvm/llvm-project] da5675: [RISCV] Change naming of vector pseudos with scala...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: da56750f82a60b5872679424fc6ae78a42c786a0
      https://github.com/llvm/llvm-project/commit/da56750f82a60b5872679424fc6ae78a42c786a0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-12 (Sat, 12 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Change naming of vector pseudos with scalar FP operand.

We need a pseudo for each scalar FP register class. Previously
we distinquished the pseudos by naming them with F16, F32, F64, or
BF16 in place of the F in the normal instruction name.

Because these strings can appear in other parts of the name we had
to do things like matching "_VBF16" to "_VF".

This patch replaces the F16, F32, F64 strings with FPR16, FPR32, and
FPR64. We also use FPR16 for BF16 since that is the scalar register
class for bf16.

Since the FPR16/32/64 string does not anywhere else in the pseudo
names, we can use this to simplify the string replacements. This
also allows us to simplify some BF16 related code.

Reviewed By: wangpc

Differential Revision: https://reviews.llvm.org/D157749