[all-commits] [llvm/llvm-project] c7b537: [AArch64] Add more efficient vector bitcast for v16i8

[Lawrence Benson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c7b537bf0923df05254f9fa4722b298eb8f4790d
      https://github.com/llvm/llvm-project/commit/c7b537bf0923df05254f9fa4722b298eb8f4790d
  Author: Lawrence Benson <github at lawben.com>
  Date:   2023-08-11 (Fri, 11 Aug 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
    M llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll

  Log Message:
  -----------
  [AArch64] Add more efficient vector bitcast for v16i8

We previously split the vector into two halves and performed two vector reduce operations followed by bit shifting and bitwise or. Now, we use NEON's zip1 to concatenate
the halves in a smart way and then perform only a single vector reduce. This boosts performance quite a bit for this small routine, as vector reduce is a rather expensive
intruction. Original discussion for this started in: https://reviews.llvm.org/D145301

Differential Revision: https://reviews.llvm.org/D156544