[all-commits] [llvm/llvm-project] 010314: [lldb][AArch64] Add reading of TLS tpidr register ...

Martin Storsjö via All-commits all-commits at lists.llvm.org
Thu Aug 10 00:09:36 PDT 2023


  Branch: refs/heads/release/17.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 010314325a1469911d4be2b5b7cdb8931b984861
      https://github.com/llvm/llvm-project/commit/010314325a1469911d4be2b5b7cdb8931b984861
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M lldb/include/lldb/Host/linux/Ptrace.h
    M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
    M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
    M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
    M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
    M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h
    M lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
    M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
    M lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-neon.c
    M lldb/test/API/functionalities/postmortem/elf-core/linux-aarch64-neon.core
    M llvm/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [lldb][AArch64] Add reading of TLS tpidr register from core files

7e229217f4215b519b886e7881bae4da3742a7d2 did live processes, this does
core files. Pretty simple, there is an NT_ARM_TLS note that contains
at least tpidr, and on systems with the Scalable Matrix Extension (SME), tpidr2
as well.

tpidr2 will be handled in future patches for SME support.

This NT_ARM_TLS note has always been present but it seems convenient to
handle it as "optional" inside of LLDB. We'll probably want the flexibility
when supporting tpidr2.

Normally the C library would set tpidr but all our test sources build
without it. So I've updated the neon test program to write to tpidr
and regenerated the corefile.

I've removed the LLDB_PTRACE_NT_ARM_TLS that was unused, we get
what we need from llvm's defs instead.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D156118


  Commit: bc0a7de379e6c2540a551d7ca6ba2cf733347a3f
      https://github.com/llvm/llvm-project/commit/bc0a7de379e6c2540a551d7ca6ba2cf733347a3f
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
    M lldb/test/API/linux/aarch64/tls_register/TestAArch64LinuxTLSRegister.py
    M lldb/test/API/linux/aarch64/tls_register/main.c

  Log Message:
  -----------
  [lldb][AArch64] Save/restore TLS registers around expressions

This was cherry-picked from 6239227172cdc92f3bb72131333f50f83a6439cf and has been
modified to remove references to the tpidr2 register that is not supported on
the 17 branch.

Previously lldb was storing them but not restoring them. Meaning that this function:
```
void expr(uint64_t value) {
  __asm__ volatile("msr tpidr_el0, %0" ::"r"(value));
}
```
When run from lldb:
```
(lldb) expression expr()
```
Would leave tpidr as `value` instead of the original value of the register.

A check for this scenario has been added to TestAArch64LinuxTLSRegister.py,

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D156512


  Commit: 67bb3ea8b81704635196e3d351d37cd6be1890c6
      https://github.com/llvm/llvm-project/commit/67bb3ea8b81704635196e3d351d37cd6be1890c6
  Author: Igor Kirillov <igor.kirillov at arm.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sve-fp-combine.ll

  Log Message:
  -----------
  [CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructions

Differential Revision: https://reviews.llvm.org/D157094

(cherry picked from commit b560d5c7e380c1c412b892a3e22f8ee15a522381)


  Commit: 9206f9ed9cd5a0ce1bee73d80010da20c2807559
      https://github.com/llvm/llvm-project/commit/9206f9ed9cd5a0ce1bee73d80010da20c2807559
  Author: Igor Kirillov <igor.kirillov at arm.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sve-fp-combine.ll

  Log Message:
  -----------
  [CodeGen] Precommit tests for D157095

(cherry picked from commit 7542477d5d6e10848ac9ba5dd5421afc7e4947d2)


  Commit: f9e9adf9b90db8a646fc67154a33e0edf0b37e10
      https://github.com/llvm/llvm-project/commit/f9e9adf9b90db8a646fc67154a33e0edf0b37e10
  Author: Igor Kirillov <igor.kirillov at arm.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sve-fp-combine.ll

  Log Message:
  -----------
  [CodeGen] Fix incorrect pattern FMLA_* pseudo instructions

* Remove the incorrect patterns from AArch64fmla_p/AArch64fmls_p
* Add correct patterns to AArch64fmla_m1/AArch64fmls_m1
* Refactor fma_patfrags for the sake of PatFrags

Fixes https://github.com/llvm/llvm-project/issues/64419

Differential Revision: https://reviews.llvm.org/D157095

(cherry picked from commit 84d444f90900d1b9d6c08be61f8d62090df28042)


  Commit: e69c715c39f05ed2d9ceedaf71feeb61e0c142ef
      https://github.com/llvm/llvm-project/commit/e69c715c39f05ed2d9ceedaf71feeb61e0c142ef
  Author: Guillaume Chatelet <gchatelet at google.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp

  Log Message:
  -----------
  [llvm-exegesis] Don't try to use SYS_rseq if it's not defined.

When compiling against recent glibc (>= 2.35) but old kernel headers (< 4.18), `SYS_rseq` is not defined and thus llvm-exegesis fails to build. So also check that `SYS_rseq` is defined before trying to use it.

Fixes https://github.com/llvm/llvm-project/issues/64456

Reviewed By: MaskRay, gchatelet

Differential Revision: https://reviews.llvm.org/D157189

(cherry picked from commit f70e83af7a708a22fdde8c644ac5810223090cd4)


  Commit: 8fb604fcd36019dc2982fea86a14efe7b3a71773
      https://github.com/llvm/llvm-project/commit/8fb604fcd36019dc2982fea86a14efe7b3a71773
  Author: Amy Huang <akhuang at google.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M clang/include/clang/CodeGen/CGFunctionInfo.h
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/CGCall.h
    M clang/lib/CodeGen/CGClass.cpp
    M clang/lib/CodeGen/CGDeclCXX.cpp
    M clang/lib/CodeGen/CodeGenABITypes.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/CodeGenFunction.h
    M clang/lib/CodeGen/CodeGenTypes.h
    M clang/lib/CodeGen/Targets/X86.cpp
    M clang/test/CodeGenCXX/inalloca-lambda.cpp

  Log Message:
  -----------
  Reland "Try to implement lambdas with inalloca parameters by forwarding without use of inallocas."t

This reverts commit 8ed7aa59f489715d39d32e72a787b8e75cfda151.

Differential Revision: https://reviews.llvm.org/D154007

(cherry picked from commit 27dab4d305acb6e0935e014c061c5317016ae2b3)


  Commit: 7832b42073d61d598be98b43d5896f578bfc3950
      https://github.com/llvm/llvm-project/commit/7832b42073d61d598be98b43d5896f578bfc3950
  Author: Igor Kirillov <igor.kirillov at arm.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/CodeGen/AArch64/sve-ld1r.ll

  Log Message:
  -----------
  [CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1

These instructions show worse performance on Neoverse-V1 compared
to pair of LDR(LDP)/MOV instructions.
This patch adds `no-sve-fp-ld1r` sub-target feature, which is enabled
only on Neoverse-V1.

Fixes https://github.com/llvm/llvm-project/issues/64498

Differential Revision: https://reviews.llvm.org/D157279

(cherry picked from commit 60e2a849b0a537f96ca12fb032c4a0e32e07b4ae)


  Commit: f71f8c923ae985abfddcc7e9feba1d3002431e5e
      https://github.com/llvm/llvm-project/commit/f71f8c923ae985abfddcc7e9feba1d3002431e5e
  Author: Jakub Kuderski <kubak at google.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp
    M mlir/test/Dialect/SPIRV/Transforms/unify-aliased-resource.mlir

  Log Message:
  -----------
  [mlir][spirv] Do not introduce vector<1xT> in UnifyAliasedResource

1-element vectors are not valid in SPIR-V and fail `Bitcast` op verification.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D156207


  Commit: a50e3a66b991130824ebcbb86f5225be36eb62fe
      https://github.com/llvm/llvm-project/commit/a50e3a66b991130824ebcbb86f5225be36eb62fe
  Author: Oleg Shyshkov <shyshkov at google.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  [mlir] Fix assembly format parser generator after 9ea6b30ac20f8223fb6aeae853e5c73691850a8d.


  Commit: 6b3e6a9db7c3f04e9199caad340a094ab21e67b2
      https://github.com/llvm/llvm-project/commit/6b3e6a9db7c3f04e9199caad340a094ab21e67b2
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    A mlir/docs/ReleaseNotes.md

  Log Message:
  -----------
  Add release notes for MLIR

Differential Revision: https://reviews.llvm.org/D156253


  Commit: 45a4a1371b7e0c17532a856c6112a8f4e4b288f2
      https://github.com/llvm/llvm-project/commit/45a4a1371b7e0c17532a856c6112a8f4e4b288f2
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
    M mlir/test/Bytecode/bytecode-lazy-loading.mlir
    M mlir/test/lib/Dialect/Test/TestOps.td

  Log Message:
  -----------
  [mlir:bytecode] Fix bytecode lazy loading for ops with multiple regions

We currently encode each region as a separate section, but
the reader expects all of the regions to be in the same section.
This updates the writer to match the behavior that the reader
expects.

Differential Revision: https://reviews.llvm.org/D156198


  Commit: 99b39d7df62365d5c0c1fad776b4fd3b0e452277
      https://github.com/llvm/llvm-project/commit/99b39d7df62365d5c0c1fad776b4fd3b0e452277
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
    M mlir/lib/Bytecode/Writer/IRNumbering.cpp
    M mlir/lib/Bytecode/Writer/IRNumbering.h
    M mlir/test/Bytecode/bytecode-lazy-loading.mlir

  Log Message:
  -----------
  [mlir:bytecode] Support lazy loading dynamically isolated regions

We currently only support lazy loading for regions that
statically implement the IsolatedFromAbove trait, but that
limits the amount of operations that can be lazily loaded. This review
lifts that restriction by computing which operations have isolated
regions when numbering, allowing any operation to be lazily loaded
as long as it doesn't use values defined above.

Differential Revision: https://reviews.llvm.org/D156199


  Commit: 685bcc1d732a929e6ad92d63f5f3368726e7830c
      https://github.com/llvm/llvm-project/commit/685bcc1d732a929e6ad92d63f5f3368726e7830c
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Bytecode/Writer/IRNumbering.cpp

  Log Message:
  -----------
  [mlir:bytecode] Only visit the all regions path if the op has regions

Zero region operations return true for both isBeforeAllRegions and
isAfterAllRegions when using WalkStage. The bytecode walk only
expects region holding operations in the after regions path, so
guard against that.


  Commit: fc209e4158ccbe383baf7cd6bcba1605e4d3d01b
      https://github.com/llvm/llvm-project/commit/fc209e4158ccbe383baf7cd6bcba1605e4d3d01b
  Author: River Riddle <riddleriver at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Tools/lsp-server-support/Transport.h
    M mlir/lib/Tools/lsp-server-support/Transport.cpp

  Log Message:
  -----------
  [mlir-lsp] Guard writing output to JSONTransport with mutex

This allows for users of the lsp transport libraries to process replies
in parallel, without overlapping/clobbering the output.

Differential Revision: https://reviews.llvm.org/D156295


  Commit: 6664b6e980fdfcb594e4f3745601b61cc58e07ae
      https://github.com/llvm/llvm-project/commit/6664b6e980fdfcb594e4f3745601b61cc58e07ae
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
    A mlir/test/Target/LLVMIR/Import/global-struct.ll

  Log Message:
  -----------
  [mlir][LLVMIR] Fix identified structs with same name

Different identified struct types may have the same name ("").
Previously, these were deduplicated based on their name, which caused
an assertion failure when nesting identified structs:

    %0 = type { %1 }
    %1 = type { i8 }
    declare void @fn(%0)

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D156531


  Commit: 3e62997c4c0fb48ce43496be80013dbf98b96a6e
      https://github.com/llvm/llvm-project/commit/3e62997c4c0fb48ce43496be80013dbf98b96a6e
  Author: Thomas Raoux <thomas.raoux at openai.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
    M mlir/test/Dialect/Arith/invalid.mlir
    M mlir/test/Dialect/Arith/ops.mlir

  Log Message:
  -----------
  [mlir] Fix arith verifier for tensor with encoding

The verifier for some arith ops were not considering that ranked
tensor types can have encodings.

Differential Revision: https://reviews.llvm.org/D156557


  Commit: 2c5ed2da4fb464e144e580ea294049db630b64ea
      https://github.com/llvm/llvm-project/commit/2c5ed2da4fb464e144e580ea294049db630b64ea
  Author: Nicolas Vasilache <nicolasvasilache at users.noreply.github.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp

  Log Message:
  -----------
  [mlir][gpu] NFC - Fail gracefully when type conversion fails instead of crashing


  Commit: 6e2cf38560923ac8af00698da80a01cd344e4b15
      https://github.com/llvm/llvm-project/commit/6e2cf38560923ac8af00698da80a01cd344e4b15
  Author: Mogball <jeff at modular.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
    M mlir/test/Target/LLVMIR/llvmir.mlir

  Log Message:
  -----------
  [mlir][llvm] Fix export of 64-bit integer function attributes

The `allocsize` attribute is weird because it packs two 32-bit values
into a 64-bit value. It also turns out that the passthrough attribute
exporter was using `int`, which is incorrectly handling 64-bit integers.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D156574


  Commit: 416411fde5071cc0fe0eb961add8dddb2a6999d3
      https://github.com/llvm/llvm-project/commit/416411fde5071cc0fe0eb961add8dddb2a6999d3
  Author: Valentin Clement <clementval at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

  Log Message:
  -----------
  [mlir] Reduce warnings for bad assertion in generated code

When the operation has no attributes, the generated assertion is
always false and triggers lots of warnings in the build.

```
warning: comparison of unsigned expression < 0 is always false
```

Just return a StringAttr when there is no attribute.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D156819


  Commit: 6dc155bc91cc37da023c2af377042343a075d3a3
      https://github.com/llvm/llvm-project/commit/6dc155bc91cc37da023c2af377042343a075d3a3
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
    A mlir/test/Bytecode/operand_segment_sizes.mlir

  Log Message:
  -----------
  [MLIR][Bytecode] Add missing field initializer in constructor initializer list

Leaving this field unitialized could led to crashes when it'll diverge from the
IRNumbering phase.

Differential Revision: https://reviews.llvm.org/D156965


  Commit: 13a8302b2e78f8dd2bdde8a0c96971ed775a8f54
      https://github.com/llvm/llvm-project/commit/13a8302b2e78f8dd2bdde8a0c96971ed775a8f54
  Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp
    M mlir/unittests/IR/AdaptorTest.cpp

  Log Message:
  -----------
  [mlir] Store segment sizes in std::array

This revision uses std::array instead of normal c arrays to store the
operand and result segment sizes. This is a follow up to
https://reviews.llvm.org/D155919, which converted the operand and result
segment sizes to properties. Its use of c arrays triggered warnings in
downstream projects due to the direct comparison of c arrays. This
revision fixes the warnings using std::arrays that implement a
proper comparison operator, which compares the array elements rather
that the array pointers.

Note: it seems the comparison operator is effectively dead code for now.
It still seems useful to fix the warning and ensure the comparison works
as expected assume someone starts using it at some point in time.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D156888


  Commit: 45ad84a742306f3160085ee94f8eb50583b7360d
      https://github.com/llvm/llvm-project/commit/45ad84a742306f3160085ee94f8eb50583b7360d
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Dialect/Vector/canonicalize.mlir

  Log Message:
  -----------
  [mlir][VectorOps] Fix folding of vector.extract from stretch vector.broadcast

Previously, foldExtractFromBroadcast() would incorrectly fold:

  func.func @extract_from_stretch_broadcast(%src: vector<3x1x2xf32>) -> f32 {
    %0 = vector.broadcast %src : vector<3x1x2xf32> to vector<3x4x2xf32>
    %1 = vector.extract %0[0, 2, 0] : vector<3x4x2xf32>
    return %1: f32
  }

to:

  func.func @extract_from_stretch_broadcast(%src: vector<3x1x2xf32>) -> f32 {
    %0 = vector.extract %src[0, 2, 0] : vector<3x1x2xf32>
    return %0: f32
  }

This was due to the wrong offset being used when zeroing the "dim-1"
broadcasted dims. It should use the difference in rank across the
broadcast as the starting offset, as the ranks after that are the ones
that could have been stretched.

Reviewed By: awarzynski, dcaballe

Differential Revision: https://reviews.llvm.org/D157003


  Commit: 600edc20b9dca58d841c5e110913082f5f845fd3
      https://github.com/llvm/llvm-project/commit/600edc20b9dca58d841c5e110913082f5f845fd3
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Pass/Pass.h
    M mlir/lib/Pass/Pass.cpp

  Log Message:
  -----------
  Clarify the invariant of the MLIR pass pipeline around `Pass::initialize()`

This method should not load new dialect or affect the context itself.

Differential Revision: https://reviews.llvm.org/D157198


  Commit: 3ac28602170b2451f71a69f0dd22e7908edecad1
      https://github.com/llvm/llvm-project/commit/3ac28602170b2451f71a69f0dd22e7908edecad1
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Transforms/DialectConversion.h
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [MLIR] Make the `ConversionTarget` const ref in the DialectConversion (NFC)

It isn't mutated during the conversion already, communicate this through the API.

Differential Revision: https://reviews.llvm.org/D157199


  Commit: 147b83573a62110bd2295df60a56ff52fb90b13c
      https://github.com/llvm/llvm-project/commit/147b83573a62110bd2295df60a56ff52fb90b13c
  Author: Mark de Wever <koraq at xs4all.nl>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M libcxx/docs/ReleaseNotes/17.rst
    M libcxx/docs/Status/Cxx20.rst

  Log Message:
  -----------
  [libc++][doc] Updates format related release notes.

As suggested by @ldionne.

Reviewed By: ldionne, #libc, avogelsgesang

Differential Revision: https://reviews.llvm.org/D156030

(cherry picked from commit cf83cfb3a569632c0049f11d0f56b851aaf21393)


  Commit: 649ab0727fb91f37a821ad8698bb52588b75258f
      https://github.com/llvm/llvm-project/commit/649ab0727fb91f37a821ad8698bb52588b75258f
  Author: Martin Storsjö <martin at martin.st>
  Date:   2023-08-10 (Thu, 10 Aug 2023)

  Changed paths:
    M llvm/tools/llvm-rc/llvm-rc.cpp

  Log Message:
  -----------
  [llvm-rc] Resolve the executable path if not present in Argv[0]

The llvm-rc tool tries to locate a suitable Clang executable to
use for preprocessing. For this purpose, it first checks within
the same directory as the llvm-rc tool, checking with a couple
different names, followed by checking all of $PATH for another
couple names.

On Windows, the InitLLVM() function always sets up Argv[0] with the
full path to the executable, while on Unix, Argv[0] is kept as is.

Therefore, call getMainExecutable to try to resolve the directory of
the executable before looking for colocated Clang executables.

This makes 282744a9ce18120dc0a6eceb02693b36980d9498 actually have
the desired effect.

Differential Revision: https://reviews.llvm.org/D157241

(cherry picked from commit 8c6a0c8bf50bca6c3a0c4de1b84f21466ee31655)


Compare: https://github.com/llvm/llvm-project/compare/a93ca35a4494...649ab0727fb9


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