[all-commits] [llvm/llvm-project] a3a7e7: [SelectionDAG] Add Opc_CheckPatternPredicate2 to s...

Craig Topper via All-commits all-commits at lists.llvm.org
Sat Aug 5 17:22:45 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a3a7e76893b81934b9aaa4ecfe8f24496c48ddab
      https://github.com/llvm/llvm-project/commit/a3a7e76893b81934b9aaa4ecfe8f24496c48ddab
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-05 (Sat, 05 Aug 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAGISel.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

  Log Message:
  -----------
  [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.

This is an alternative to D156967 where I suggested the author
could use a VBR type.

This patch takes inspirations from Opc_EmitRegister2 that is used
for two byte registers.

I'm assuming 1 or 2 byte predicates should be enough so we don't
need the fully generality of VBR.

This avoids impacting the table size on targets that have more than
128 predicates already like X86.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D157196




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