[all-commits] [llvm/llvm-project] c15e7b: [RISCV] Add explicit i64 to an isel pattern that i...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c15e7bb97d2e3fcb682b8e32fef68e3674e58a7e
      https://github.com/llvm/llvm-project/commit/c15e7bb97d2e3fcb682b8e32fef68e3674e58a7e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-04 (Fri, 04 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td

  Log Message:
  -----------
  [RISCV] Add explicit i64 to an isel pattern that is only valid for RV64. NFC

This stops tablegen from generating an unneeded pattern checking for
an i32 type.