[all-commits] [llvm/llvm-project] 440001: [RISCV] Model all 3 arithmetic sources of vector F...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 44000181fd53c8e100acad55e99e89403d64daf8
      https://github.com/llvm/llvm-project/commit/44000181fd53c8e100acad55e99e89403d64daf8
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-04 (Fri, 04 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td

  Log Message:
  -----------
  [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.

For the most part, MC version of vector instructions don't model when
the destination is also a source. This primarily occurs for mask/tail
undisturbed. The MC layer can't see the policy bits so this kind of
makes sense.

We also lumped FMA instructions into this, but the destination of
FMA is an arithmetic source not just an undisturbed value. This needs
to be correct for llvm-mca to understand the dependency for the FMA
instructions. Though every other instruction is still wrong for
tail/mask undisturbed.

This patch models the FMA instructions correctly at the MCA layer.
This necessitates changes to the assembler to offset operand numbers.

I've added the extra sched class operand and fixed the operand order
for the scalar read class.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D151850