[all-commits] [llvm/llvm-project] 2a5e3f: [X86] Workaround possible CPUID bug in Sandy Bridge.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a5e3f4c6c2cdd2aab55fbfdb703ca8163351ea9
      https://github.com/llvm/llvm-project/commit/2a5e3f4c6c2cdd2aab55fbfdb703ca8163351ea9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-03 (Thu, 03 Aug 2023)

  Changed paths:
    M compiler-rt/lib/builtins/cpu_model.c
    M llvm/lib/TargetParser/Host.cpp

  Log Message:
  -----------
  [X86] Workaround possible CPUID bug in Sandy Bridge.

Don't access leaf 7 subleaf 1 unless subleaf 0 says it is
supported via EAX.

Intel documentation says invalid subleaves return 0. We had been
relying on that behavior instead of checking the max sublef number.

It appears that some Sandy Bridge CPUs return at least the subleaf 0
EDX value for subleaf 1. Best guess is that this is a bug in a
microcode patch since all of the bits we're seeing set in EDX were
introduced after Sandy Bridge was originally released.

This is causing avxvnniint16 to be incorrectly enabled with -march=native
on these CPUs.

Reviewed By: pengfei, anna

Differential Revision: https://reviews.llvm.org/D156963