[all-commits] [llvm/llvm-project] 667602: [RISCV] Implement support for bf16 select when zfb...

[Alex Bradbury via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 667602793bef72e64367ac46cbaf96e3afaea22e
      https://github.com/llvm/llvm-project/commit/667602793bef72e64367ac46cbaf96e3afaea22e
  Author: Alex Bradbury <asb at igalia.com>
  Date:   2023-08-02 (Wed, 02 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    A llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
    A llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll

  Log Message:
  -----------
  [RISCV] Implement support for bf16 select when zfbfmin is enabled

These test cases previously caused an error. RISCVInstrInfo::copyPhysReg also needed a tweak in order to account for copying bf16 values in FPR16 registers.

Differential Revision: https://reviews.llvm.org/D156883