[all-commits] [llvm/llvm-project] edb505: [RISCV] Use correct LMUL!=1 types for __attribute_...

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: edb5056300bbb327a4b07b4f64ccc8678345721a
      https://github.com/llvm/llvm-project/commit/edb5056300bbb327a4b07b4f64ccc8678345721a
  Author: wangpc <wangpengcheng.pp at bytedance.com>
  Date:   2023-08-02 (Wed, 02 Aug 2023)

  Changed paths:
    M clang/lib/CodeGen/Targets/RISCV.cpp
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c

  Log Message:
  -----------
  [RISCV] Use correct LMUL!=1 types for __attribute__((riscv_rvv_vector_bits(N)))

We used to convert them to M1 types in arguments and return
value, which causes failures in CodeGen since it is not legal
to insert subvectors with LMUL>1 to M1 vectors.

Fixes 64266

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156779