[all-commits] [llvm/llvm-project] 8eeabf: [AArch64] Add funnel shift lowering for SelectionDAG

[chuongg3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8eeabf674ca0f71aaf8120ebe387ea8e8f4e686c
      https://github.com/llvm/llvm-project/commit/8eeabf674ca0f71aaf8120ebe387ea8e8f4e686c
  Author: Tuan Chuong Goh <chuong.goh at arm.com>
  Date:   2023-07-28 (Fri, 28 Jul 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/test/CodeGen/AArch64/arm64-long-shift.ll
    M llvm/test/CodeGen/AArch64/icmp-shift-opt.ll
    M llvm/test/CodeGen/AArch64/logic-shift.ll
    M llvm/test/CodeGen/AArch64/nontemporal-load.ll
    M llvm/test/CodeGen/AArch64/pr55201.ll
    M llvm/test/CodeGen/AArch64/setcc-fsh.ll
    M llvm/test/CodeGen/AArch64/wide-scalar-shift-legalization.ll
    M llvm/test/CodeGen/AArch64/zext-to-tbl.ll

  Log Message:
  -----------
  [AArch64] Add funnel shift lowering for SelectionDAG

Consider FSHR legal if shift amount is constant
Lower FSHL to FSHR if shift amount is constant

Differential Revision: https://reviews.llvm.org/D155565