[all-commits] [llvm/llvm-project] e56bf1: [RISCV] Remove some instructions from Zvfbfwma by ...

[joshua-arch1 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e56bf133170c9fd49c91fe943ded26a3f2b30a04
      https://github.com/llvm/llvm-project/commit/e56bf133170c9fd49c91fe943ded26a3f2b30a04
  Author: Jun Sha (Joshua) <cooper.joshua at linux.alibaba.com>
  Date:   2023-07-28 (Fri, 28 Jul 2023)

  Changed paths:
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/rv64zhinx-invalid.s
    M llvm/test/MC/RISCV/rv64zhinxmin-invalid.s
    M llvm/test/MC/RISCV/rvv/zvfbfwma.s

  Log Message:
  -----------
  [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec

According to the latest spec, Zvfbfwma requires Zvfbfmin and Zvfbfmin requires Zfbfmin, with FLH/FSH/FMV.H.X/HMV.X.H removed from Zvfbfwma.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D155916