[all-commits] [llvm/llvm-project] cdffaa: [RISCV] Add Zbs instructions to SiFive7 SchedModel

[Michael Maitland via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cdffaac6ad2e0f9fcbe0ee75a5d3d78fea91cfa5
      https://github.com/llvm/llvm-project/commit/cdffaac6ad2e0f9fcbe0ee75a5d3d78fea91cfa5
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2023-07-25 (Tue, 25 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td

  Log Message:
  -----------
  [RISCV] Add Zbs instructions to SiFive7 SchedModel

BEXT[I] is available on A and B pipes, and has single-cycle latency. The other
instructions are only available on B-pipe, but otherwise have single-cycle
latency.