[all-commits] [llvm/llvm-project] 4cf11d: [Clang][SVE] Permit specific predicate-as-counter ...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4cf11d8a65dfded59761ec52804a86277b9c0036
      https://github.com/llvm/llvm-project/commit/4cf11d8a65dfded59761ec52804a86277b9c0036
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2023-07-25 (Tue, 25 Jul 2023)

  Changed paths:
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/test/CodeGen/aarch64-sve-inline-asm.c

  Log Message:
  -----------
  [Clang][SVE] Permit specific predicate-as-counter registers in inline assembly

This patch adds the predicate-as-counter registers pn0-pn15 to the
list of supported registers used when writing inline assembly.

Tests added to

  clang/test/CodeGen/aarch64-sve-inline-asm.c

Differential Revision: https://reviews.llvm.org/D156115