[all-commits] [llvm/llvm-project] 620e61: [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl...

[Liao Chunyu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 620e61c5181dbb13a5115efb2d5b40bb2b429771
      https://github.com/llvm/llvm-project/commit/620e61c5181dbb13a5115efb2d5b40bb2b429771
  Author: LiaoChunyu <chunyu at iscas.ac.cn>
  Date:   2023-07-25 (Tue, 25 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
    A llvm/test/CodeGen/RISCV/rvv/vnsra-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vnsrl-vp.ll

  Log Message:
  -----------
  [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl to vnsra.wv/vnsrl.wv

similar to D117454, try to add vl patterns and testcases.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D155466