[all-commits] [llvm/llvm-project] a8cbd2: [Clang][AArch64] svldr_vnum/svstr_vnum should use ...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a8cbd27d1f238e104a5d5ca345d93bc1f4d4ab1f
      https://github.com/llvm/llvm-project/commit/a8cbd27d1f238e104a5d5ca345d93bc1f4d4ab1f
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2023-07-24 (Mon, 24 Jul 2023)

  Changed paths:
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c

  Log Message:
  -----------
  [Clang][AArch64] svldr_vnum/svstr_vnum should use cntsb iso vscale for the offset

The specification for LDR/STR says that:

  The ZA array vector is selected by the sum of the vector select register
  and immediate offset, modulo the number of bytes in a Streaming SVE
  vector. [..] This instruction does not require the PE to be in Streaming
  SVE mode

When the instruction is used outside of streaming mode, 'vscale' will result
in the wrong value being used for the offset because LLVM's code-generator
will emit the non-streaming 'RDVL/ADDVL' instead of the 'RDSVL/ADDSVL'
instructions which are used to get the Streaming-SVE vector length.

Reviewed By: bryanpkc

Differential Revision: https://reviews.llvm.org/D156121