[all-commits] [llvm/llvm-project] 5b95bb: [RISCV] Set Fast flag for unaligned memory accesses

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b95bba6fe411e82c7c31cb542748b00ff633cdb
      https://github.com/llvm/llvm-project/commit/5b95bba6fe411e82c7c31cb542748b00ff633cdb
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-07-24 (Mon, 24 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/memcpy-inline.ll
    M llvm/test/CodeGen/RISCV/memset-inline.ll
    M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
    M llvm/test/CodeGen/RISCV/unaligned-load-store.ll

  Log Message:
  -----------
  [RISCV] Set Fast flag for unaligned memory accesses

The +unaligned-scalar-mem and +unaligned-vector-mem features were added in
D126085 and D149375 respectively to allow subtargets to indicate that
they supported misaligned loads/stores with "sufficient" performance.
This is separate from whether or not the target actually supports
misaligned accesses, which could be determined from Zicclsm.

This patch enables the Fast flag under the assumption that any subtarget
that declares support for +unaligned-*-mem will want to opt into
optimisations that take advantage of misaligned scalar accesses, such as
store merging.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D150771