[all-commits] [llvm/llvm-project] 8dbddb: [mlir] allow region branch spec from parent op to ...

ftynse via All-commits all-commits at lists.llvm.org
Fri Jul 21 02:17:11 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8dbddb17180fff0ed881d75689651769b9a9b483
      https://github.com/llvm/llvm-project/commit/8dbddb17180fff0ed881d75689651769b9a9b483
  Author: Alex Zinenko <zinenko at google.com>
  Date:   2023-07-21 (Fri, 21 Jul 2023)

  Changed paths:
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
    M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
    M mlir/lib/Dialect/SCF/IR/SCF.cpp
    M mlir/test/Analysis/DataFlow/test-next-access.mlir

  Log Message:
  -----------
  [mlir] allow region branch spec from parent op to itself

RegionBranchOpInterface did not allow the operation with regions to
specify itself as successors. Therefore, this implied that the control
is always transferred to a region before being transferred back to the
parent op. Since the region can only transfer the control back to the
parent op from a terminator, this transitively implied that the first
block of any region with a RegionBranchOpInterface is always executed
until the terminator can transfer the control flow back. This is
trivially false for any conditional-like operation that may or may not
execute the region, as well as for loop-like operations that may not
execute the body.

Remove the restriction from the interface description and update the
only transform that relied on it.

See
https://discourse.llvm.org/t/rfc-region-control-flow-interfaces-should-encode-region-not-executed-correctly/72103.

Depends On: https://reviews.llvm.org/D155757

Reviewed By: Mogball, springerm

Differential Revision: https://reviews.llvm.org/D155822




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