[all-commits] [llvm/llvm-project] 09174c: [RISCV] Remove unused Opcode field from RVInst16. NFC

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 09174c085389702ba703344d56a6f657a898dab8
      https://github.com/llvm/llvm-project/commit/09174c085389702ba703344d56a6f657a898dab8
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-20 (Thu, 20 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrFormatsC.td

  Log Message:
  -----------
  [RISCV] Remove unused Opcode field from RVInst16. NFC

Unlike RVInst which also has an Opcode field, all of the subclasseso
of RVInst16 assign Inst{1-0} directly.

Reviewed By: asb, wangpc

Differential Revision: https://reviews.llvm.org/D155791


  Commit: 24bb36e58eac6da7f8437c1a9ff8ad96e10578ca
      https://github.com/llvm/llvm-project/commit/24bb36e58eac6da7f8437c1a9ff8ad96e10578ca
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-20 (Thu, 20 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td
    M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td

  Log Message:
  -----------
  [RISCV] Remove Opcode field from RVInst. Assign Inst{6-0} directly. NFC

Most places assign Opcode right after assigning every other bit in
Inst. I don't think treating Opcode separately adds much value. It
doesn't hide what bits belong to the opcode since every other bits is
listed.

This makes RVInst consistent with RVInst16 subclasss which already
assign Inst{1-0} directly.

Reviewed By: asb, wangpc

Differential Revision: https://reviews.llvm.org/D155797


Compare: https://github.com/llvm/llvm-project/compare/ab6827f2d432...24bb36e58eac