[all-commits] [llvm/llvm-project] 7dfe62: [RISCV] Add a DAG combine for (czero_eq X, (xor Y, ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7dfe62327db81cc5ee3e29a994818370d95dc9e3
      https://github.com/llvm/llvm-project/commit/7dfe62327db81cc5ee3e29a994818370d95dc9e3
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-07-19 (Wed, 19 Jul 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/condops.ll

  Log Message:
  -----------
  [RISCV] Add a DAG combine for (czero_eq X, (xor Y, 1)) -> (czero_ne X, Y) if Y is 0 or 1.

This is an alternative to D155288 that can handle other sources of
xori like FP compares. Unfortunately, it misses the i64 setge case
on RV32 in condops.ll.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D155328