[all-commits] [llvm/llvm-project] 66dc29: [RISCV] Add tests for merges with differing VLs th...
Luke Lau via All-commits
all-commits at lists.llvm.org
Wed Jul 19 09:24:58 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 66dc29a82a7c9a5827caea98847be7547e451431
https://github.com/llvm/llvm-project/commit/66dc29a82a7c9a5827caea98847be7547e451431
Author: Luke Lau <luke at igalia.com>
Date: 2023-07-19 (Wed, 19 Jul 2023)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
Log Message:
-----------
[RISCV] Add tests for merges with differing VLs that could be folded
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D155069
Commit: 0f277ab3616a16748303c673f1b7c279d5d238d3
https://github.com/llvm/llvm-project/commit/0f277ab3616a16748303c673f1b7c279d5d238d3
Author: Luke Lau <luke at igalia.com>
Date: 2023-07-19 (Wed, 19 Jul 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
Log Message:
-----------
[RISCV] Fold vmerge into its ops with smaller VL if known
Currently when folding vmerge into its operands, we stop if the VLs aren't
identical. However since the body of (vmerge (vop)) is the intersection of
vmerge and vop's bodies, we can use the smaller of the two VLs if we know it
ahead of time. This patch relaxes the constraint on VL if they are both
constants, or if either of them are VLMAX.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D155071
Commit: efedcbeeb88c3cfd6fffb861067e36c43476a002
https://github.com/llvm/llvm-project/commit/efedcbeeb88c3cfd6fffb861067e36c43476a002
Author: Luke Lau <luke at igalia.com>
Date: 2023-07-19 (Wed, 19 Jul 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-vmv.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
Log Message:
-----------
[RISCV] Fold ops into vmv.v.v as vmerge with all-ones mask
A vmv.v.v shares the same encoding as a vmerge that isn't masked, so we can
also fold it into its operands if we treat it as a vmerge with an all-ones
mask. We take care here not to actually transform the existing vmv into a
vmerge, otherwise things like True.hasOneUse() become inaccurate. Instead this
just returns an equivalent list of operands.
This is an alternative to D153351.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D155101
Compare: https://github.com/llvm/llvm-project/compare/65cd3cfed220...efedcbeeb88c
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