[all-commits] [llvm/llvm-project] 5bc836: [X86] LowerEXTEND_VECTOR_INREG - add sign_extend_v...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5bc836422e11125a9e4fe6909b85906826a7e670
      https://github.com/llvm/llvm-project/commit/5bc836422e11125a9e4fe6909b85906826a7e670
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-07-19 (Wed, 19 Jul 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/bitcast-and-setcc-128.ll
    M llvm/test/CodeGen/X86/bitcast-setcc-128.ll
    M llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
    M llvm/test/CodeGen/X86/sext-vsetcc.ll
    M llvm/test/CodeGen/X86/vec_saddo.ll
    M llvm/test/CodeGen/X86/vec_smulo.ll
    M llvm/test/CodeGen/X86/vec_ssubo.ll
    M llvm/test/CodeGen/X86/vec_uaddo.ll
    M llvm/test/CodeGen/X86/vec_umulo.ll
    M llvm/test/CodeGen/X86/vec_usubo.ll
    M llvm/test/CodeGen/X86/vector-compare-all_of.ll
    M llvm/test/CodeGen/X86/vector-compare-any_of.ll
    M llvm/test/CodeGen/X86/vector-sext.ll

  Log Message:
  -----------
  [X86] LowerEXTEND_VECTOR_INREG - add sign_extend_vector_inreg fast path for all-signbits source values

If the source operand is already all-signbits we don't need to create the sign extended elements - just splat the source element to the destination element width