[all-commits] [llvm/llvm-project] 74c0bd: [AArch64][GISel] Additional FPTrunc vector lowering
David Green via All-commits
all-commits at lists.llvm.org
Tue Jul 18 10:52:34 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 74c0bdff7da343871303ff985f6a12088a910d7e
https://github.com/llvm/llvm-project/commit/74c0bdff7da343871303ff985f6a12088a910d7e
Author: David Green <david.green at arm.com>
Date: 2023-07-18 (Tue, 18 Jul 2023)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
A llvm/test/CodeGen/AArch64/fptrunc.ll
Log Message:
-----------
[AArch64][GISel] Additional FPTrunc vector lowering
I was attempting to add llvm.reduce.fminimum/fmaximum support for GlobalISel.
In the process I noticed that llvm.reduce.fmin/fmax was missing, and could do
with being added first. That led on to adding additional vector support for
minnum/maxnum, which in turn led to needing to handle fptrunc and fpext for
some of the fp16 types. So this patch extends the vector handling for fptrunc,
adding support for f16 types which are clamped to 4 elements, and scalarizing
the rest.
I went round in circles a little with how smaller than legal vectors should be
handled, but this seems simple and seems to work, if not always optimally yet.
Differential Revision: https://reviews.llvm.org/D155311
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