[all-commits] [llvm/llvm-project] 0c0552: [RISCV] Use RISCVISD::CZERO_EQZ/CZERO_NEZ for XVen...
Craig Topper via All-commits
all-commits at lists.llvm.org
Tue Jul 18 10:18:30 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 0c055286b2178c28f61142d6f1c40a05e3e45dd8
https://github.com/llvm/llvm-project/commit/0c055286b2178c28f61142d6f1c40a05e3e45dd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-07-18 (Tue, 18 Jul 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/select.ll
Log Message:
-----------
[RISCV] Use RISCVISD::CZERO_EQZ/CZERO_NEZ for XVentanaCondOps.
This makes Zicond and XVentanaCondOps use the same code path.
The instructions have identical semantics.
Reviewed By: wangpc
Differential Revision: https://reviews.llvm.org/D155391
More information about the All-commits
mailing list