[all-commits] [llvm/llvm-project] aa9a10: [mlir][SparseTensor][ArmSVE] Conditionally disable...

[Andrzej Warzyński via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: aa9a10ac1dde3e6a07d48034af49dd80134a9ba2
      https://github.com/llvm/llvm-project/commit/aa9a10ac1dde3e6a07d48034af49dd80134a9ba2
  Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
  Date:   2023-07-18 (Tue, 18 Jul 2023)

  Changed paths:
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
    M mlir/test/lit.site.cfg.py.in

  Log Message:
  -----------
  [mlir][SparseTensor][ArmSVE] Conditionally disable SVE RUN line

This patch updates one SparseTensor integration test so that the VLA
vectorisation is run conditionally based on the value of the
MLIR_RUN_ARM_SME_TESTS CMake variable.

This change opens the path to reduce the duplication of RUN lines in
"mlir/test/Integration/Dialect/SparseTensor/CPU/". ATM, there are
usually 2 RUN lines to test vectorization in SparseTensor integration
tests:
  * one for VLS vectorisation,
  * one for VLA vectorisation whenever that's available and which
    reduces to VLS vectorisation when VLA is not supported.
When VLA is not available, VLS vectorisation is verified twice. This
duplication should be avoided - integration test are relatively
expansive to run.

This patch makes sure that the 2nd vectorisation RUN line becomes:
```
  if (SVE integration tests are enabled)
    run VLA vectorisation
  else
    return
```
This logic is implemented using LIT's (relatively new) conditional
substitution [1]. It enables us to guarantee that all RUN lines are
unique and that the VLA vectorisation is only enabled when supported.

This patch updates only 1 test to set-up and to demonstrate the logic.
Subsequent patches will update the remaining tests.

[1] https://www.llvm.org/docs/TestingGuide.html

Differential Revision: https://reviews.llvm.org/D155403