[all-commits] [llvm/llvm-project] fd2de5: [X86] Canonicalize vXi64 SIGN_EXTEND_INREG vXi1 to...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd2de54920d653eded0260ca7d056ec5ec86fb4d
      https://github.com/llvm/llvm-project/commit/fd2de54920d653eded0260ca7d056ec5ec86fb4d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-07-17 (Mon, 17 Jul 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
    M llvm/test/CodeGen/X86/promote-cmp.ll
    M llvm/test/CodeGen/X86/vector-bo-select.ll
    M llvm/test/CodeGen/X86/vector-sext.ll
    M llvm/test/CodeGen/X86/vselect.ll
    M llvm/test/CodeGen/X86/vsplit-and.ll

  Log Message:
  -----------
  [X86] Canonicalize vXi64 SIGN_EXTEND_INREG vXi1 to use v2Xi32 splatted shifts instead

If somehow a vXi64 bool sign_extend_inreg pattern has been lowered to vector shifts (without PSRAQ support), then try to canonicalize to vXi32 shifts to improve likelihood of value tracking being able to fold them away.

Using a PSLLQ and bitcasted PSRAD node make it very difficult for later fold to recover from this.