[all-commits] [llvm/llvm-project] 2c6422: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
XinWang10 via All-commits
all-commits at lists.llvm.org
Sun Jul 9 20:22:00 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2c64226d84174dd1d9f93e1884c1b0bd432f89b5
https://github.com/llvm/llvm-project/commit/2c64226d84174dd1d9f93e1884c1b0bd432f89b5
Author: XinWang10 <xin10.wang at intel.com>
Date: 2023-07-09 (Sun, 09 Jul 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/peephole-test-after-add.mir
Log Message:
-----------
[X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Previously we remove a pattern like:
%reg = and32ri %in_reg, 5
... // EFLAGS not changed.
%src_reg = subreg_to_reg 0, %reg, %subreg.sub_index
test64rr %src_reg, %src_reg, implicit-def $eflags
We can remove test64rr since it has same functionality as and subreg_to_reg avoid the opt in previous code, so we handle this case specially.
And this case is also can be opted for the same reason, like:
%reg = and32ri %in_reg, 5
... // EFLAGS not changed.
%src_reg = copy %reg.sub_16bit:gr32
test16rr %src_reg, %src_reg, implicit-def $eflags
The COPY from gr32 to gr16 prevent the opt in previous code too, just handle it specially as what we did for test64rr.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D154193
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