[all-commits] [llvm/llvm-project] 30fd35: AMDGPU: Add some notes about amdgpu-flat-work-grou...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Fri Jul 7 16:03:00 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 30fd35f59ceb4c00a550b82af767a5b9cf9e252d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-07-07 (Fri, 07 Jul 2023)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  AMDGPU: Add some notes about amdgpu-flat-work-group-size

  Commit: 11ad5401187761e7b4a4315b38125188037b60e8
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-07-07 (Fri, 07 Jul 2023)

  Changed paths:
    A llvm/test/tools/llvm-reduce/Inputs/llvm-as-and-filecheck.py
    A llvm/test/tools/llvm-reduce/uselistorder-invalid-ir-output.ll

  Log Message:
  llvm-reduce: Add broken testcase that shows uselistorder problem

I've been trying to track down this problem for a while and finally
found a small enough reproducer for a test. Reductions sometimes
produce text IR which does not parse, with errors such as

"error: wrong number of indexes, expected 9"

This appears to not happen with bitcode reduction, as the bitcode
reader seems to silently discard uselistorder when the sizes don't
match. I believe this is caused by dangling constants in the
LLVMContext, which is currently recycled between different reductions.

Compare: https://github.com/llvm/llvm-project/compare/16e61eb0c4d3...11ad54011877

More information about the All-commits mailing list