[all-commits] [llvm/llvm-project] a2b511: [PowerPC] Update InputOps of Power10 SchedModel

Qiu Chaofan via All-commits all-commits at lists.llvm.org
Fri Jul 7 07:46:41 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a2b5117df75d1be8a65b2a86d5f75a59a8565fe6
  Author: Qiu Chaofan <qiucofan at cn.ibm.com>
  Date:   2023-07-07 (Fri, 07 Jul 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/P10InstrResources.td
    M llvm/lib/Target/PowerPC/PPCScheduleP10.td
    M llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
    M llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
    M llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
    M llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll
    M llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll
    M llvm/test/CodeGen/PowerPC/vector-reduce-add.ll

  Log Message:
  [PowerPC] Update InputOps of Power10 SchedModel

Count of input operands affect pipeline forwarding in scheduling model.
Previous Power10 model definition arranges some instructions into
incorrect groups, by counting the wrong number of input operands.

This patch updates the model, setting the input operands count correctly
by excluding irrelevant immediate operands and count memory operands of
load instructions correctly.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D153842

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