[all-commits] [llvm/llvm-project] 439275: [RISCV] Rename prefix `fixed-vector` to `fixed-vec...

[Jim Lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 43927542d8364ae1c3838625c027f6fb31c3d3e6
      https://github.com/llvm/llvm-project/commit/43927542d8364ae1c3838625c027f6fb31c3d3e6
  Author: Jim Lin <jim at andestech.com>
  Date:   2023-07-07 (Fri, 07 Jul 2023)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-deinterleave-load.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-fpext-vp.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-fptrunc-vp.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-interleave-store.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-inttoptr-ptrtoint.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-load.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-store.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-extract-subvector.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-reverse.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-transpose.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-vslide1down.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-vslide1up.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-negative.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp-mask.ll
    R llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-inttoptr-ptrtoint.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-load.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-store.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-extract-subvector.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-transpose.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp-mask.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll

  Log Message:
  -----------
  [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases. NFC.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154679