[all-commits] [llvm/llvm-project] 564713: [mlir][ArmSME] Add basic lowering of vector.transf...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 564713c47175d9f61fe8e18e750fb7f7b486d533
      https://github.com/llvm/llvm-project/commit/564713c47175d9f61fe8e18e750fb7f7b486d533
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2023-07-03 (Mon, 03 Jul 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.h
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Transforms.h
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
    M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/ArmSME/Transforms/LegalizeForLLVMExport.cpp
    A mlir/lib/Dialect/ArmSME/Transforms/LowerVectorOps.cpp
    A mlir/test/Dialect/ArmSME/vector-ops.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
    M mlir/test/Target/LLVMIR/arm-sme.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Add basic lowering of vector.transfer_write to zero

This patch adds support for lowering a 'vector.transfer_write' of zeroes
and type 'vector<[16x16]xi8>' to the SME 'zero {za}' instruction [1],
which zeroes the entire accumulator, and then writing it out to memory
with the 'str' instruction [2].

This contributes to supporting a path from 'linalg.fill' to SME.

[1] https://developer.arm.com/documentation/ddi0602/2022-06/SME-Instructions/ZERO--Zero-a-list-of-64-bit-element-ZA-tiles-
[2] https://developer.arm.com/documentation/ddi0602/2022-06/SME-Instructions/STR--Store-vector-from-ZA-array-

Reviewed By: awarzynski, dcaballe, WanderAway

Differential Revision: https://reviews.llvm.org/D152508