[all-commits] [llvm/llvm-project] 1c676e: [RISCV] Do a more complete job of disabling extend...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1c676e08d0ac4626b6347d01c4e110a85c97f9d2
      https://github.com/llvm/llvm-project/commit/1c676e08d0ac4626b6347d01c4e110a85c97f9d2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-06-29 (Thu, 29 Jun 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/pr63596.ll

  Log Message:
  -----------
  [RISCV] Do a more complete job of disabling extending loads and truncating stores for fixed vector types.

We weren't marking some combinations as Expand if ones of the
types wasn't legal.

Fixes #63596.