[all-commits] [llvm/llvm-project] 003b58: IR: Add llvm.frexp intrinsic

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 003b58f65bdd5d9c7d0c1b355566c9ef430c0e7d
      https://github.com/llvm/llvm-project/commit/003b58f65bdd5d9c7d0c1b355566c9ef430c0e7d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-06-28 (Wed, 28 Jun 2023)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/RuntimeLibcalls.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/RuntimeLibcalls.def
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    A llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
    A llvm/test/CodeGen/PowerPC/llvm.frexp.ll
    A llvm/test/CodeGen/X86/llvm.frexp.f80.ll
    A llvm/test/CodeGen/X86/llvm.frexp.ll

  Log Message:
  -----------
  IR: Add llvm.frexp intrinsic

Add an intrinsic which returns the two pieces as multiple return
values. Alternatively could introduce a pair of intrinsics to
separately return the fractional and exponent parts.

AMDGPU has native instructions to return the two halves, but could use
some generic legalization and optimization handling. For example, we
should be able to handle legalization of f16 on older targets, and for
bf16. Additionally antique targets need a hardware workaround which
would be better handled in the backend rather than in library code
where it is now.


  Commit: 85bdea023f5116f789095b606554739403042a21
      https://github.com/llvm/llvm-project/commit/85bdea023f5116f789095b606554739403042a21
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-06-28 (Wed, 28 Jun 2023)

  Changed paths:
    M clang/include/clang/Basic/Builtins.def
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/aix-builtin-mapping.c
    M clang/test/CodeGen/builtin-attributes.c
    M clang/test/CodeGen/math-builtins-long.c
    M clang/test/CodeGen/math-builtins.c
    M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl

  Log Message:
  -----------
  clang: Use new frexp intrinsic for builtins and add f16 version


Compare: https://github.com/llvm/llvm-project/compare/ee476996bec7...85bdea023f51