[all-commits] [llvm/llvm-project] 11b71a: [PowerPC][TLS] Add additional TLS X-Form loads/sto...

[Amy Kwan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 11b71ade51e0d1f90f1c68a7552a11f7e85eace1
      https://github.com/llvm/llvm-project/commit/11b71ade51e0d1f90f1c68a7552a11f7e85eace1
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2023-06-27 (Tue, 27 Jun 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/P10InstrResources.td
    M llvm/lib/Target/PowerPC/P9InstrResources.td
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
    M llvm/test/CodeGen/PowerPC/tls-pie-xform.ll
    M llvm/test/MC/PowerPC/ppc64-tls-relocs-01.s
    A llvm/test/MC/PowerPC/ppc64-tls-relocs-double-01.s
    A llvm/test/MC/PowerPC/ppc64-tls-relocs-float-01.s

  Log Message:
  -----------
  [PowerPC][TLS] Add additional TLS X-Form loads/store instructions

This patch is a follow up to D43315, and adds the following new load/store
TLS specific instructions for integer and floating point scalar types:
```
LHAXTLS
LWAXTLS
LHAXTLS_32
LWAXTLS_32
LFSXTLS
LFDXTLS
STFSXTLS
STFDXTLS
```
These instructions can be used to optimized TLS sequences when D-Form
loads/stores follow an ADD_TLS instruction.

Duplicate versions of these instructions are also added within an isAsmParserOnly=1
block (similar to D47382) to allow llvm-mc to assemble these instructions.

Differential Revision: https://reviews.llvm.org/D153645