[all-commits] [llvm/llvm-project] 5a1cdc: [mlir] Narrow bitwidth emulation for MemRef load

yzhang93 via All-commits all-commits at lists.llvm.org
Mon Jun 26 14:21:53 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5a1cdcbd8698cd263696b38e2672fccac9ec793c
      https://github.com/llvm/llvm-project/commit/5a1cdcbd8698cd263696b38e2672fccac9ec793c
  Author: yzhang93 <zhyuhang88 at gmail.com>
  Date:   2023-06-26 (Mon, 26 Jun 2023)

  Changed paths:
    A mlir/include/mlir/Dialect/Arith/Transforms/NarrowTypeEmulationConverter.h
    M mlir/include/mlir/Dialect/Arith/Transforms/Passes.h
    M mlir/include/mlir/Dialect/MemRef/Transforms/Transforms.h
    M mlir/lib/Dialect/Arith/Transforms/CMakeLists.txt
    A mlir/lib/Dialect/Arith/Transforms/EmulateNarrowType.cpp
    M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
    A mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
    A mlir/test/Dialect/Arith/emulate-narrow-type.mlir
    A mlir/test/Dialect/MemRef/emulate-narrow-type-diff-load-compute.mlir
    A mlir/test/Dialect/MemRef/emulate-narrow-type-same-load-compute.mlir
    M mlir/test/lib/Dialect/MemRef/CMakeLists.txt
    A mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
    M mlir/tools/mlir-opt/mlir-opt.cpp

  Log Message:
  -----------
  [mlir] Narrow bitwidth emulation for MemRef load

This patch adds support for narrow bitwidth storage emulation. The goal is to support sub-byte type
codegen for LLVM CPU. Specifically, a type converter is added to convert memref of narrow bitwidth
(e.g., i4) into supported wider bitwidth (e.g., i8). Another focus of this patch is to populate the
pattern for int4 memref.load. memref.store pattern should be added in a seperate patch.

Reviewed By: hanchung, mravishankar

Differential Revision: https://reviews.llvm.org/D151519




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