[all-commits] [llvm/llvm-project] 10b1f5: [AArch64][GlobalISel] IR translate support for a r...

[Amara Emerson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 10b1f58cba4f7e32134a8e50e97b402f81572a5a
      https://github.com/llvm/llvm-project/commit/10b1f58cba4f7e32134a8e50e97b402f81572a5a
  Author: Niwin Anto <niwin.anto at hightec-rt.com>
  Date:   2023-06-25 (Sun, 25 Jun 2023)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] IR translate support for a return instruction of type <1 x i8> or <1 x i16> when using GlobalISel.

Code generation for return instruction of type <1 x i8> or <1 x i16> when using GlobalISel causes internal compiler crash Could not handle ret ty.

Fixes: https://github.com/llvm/llvm-project/issues/58211

Differential Revision: https://reviews.llvm.org/D153300