[all-commits] [llvm/llvm-project] b410d2: [BOLT][RISCV] Implement R_RISCV_ADD32/SUB32

[Job Noorman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b410d24a194482bbf06aed8956083fabd52d6069
      https://github.com/llvm/llvm-project/commit/b410d24a194482bbf06aed8956083fabd52d6069
  Author: Job Noorman <jnoorman at igalia.com>
  Date:   2023-06-22 (Thu, 22 Jun 2023)

  Changed paths:
    M bolt/lib/Core/Relocation.cpp
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/RISCV/reloc-jt.s
    A bolt/test/RISCV/reloc-label-diff.s

  Log Message:
  -----------
  [BOLT][RISCV] Implement R_RISCV_ADD32/SUB32

Thispatch implements the R_RISCV_ADD32 and R_RISCV_SUB32 relocations for
RISC-V.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D146554


  Commit: 38ba2824c85606e0e7bb2071055d0c7aceb463c1
      https://github.com/llvm/llvm-project/commit/38ba2824c85606e0e7bb2071055d0c7aceb463c1
  Author: Job Noorman <jnoorman at igalia.com>
  Date:   2023-06-22 (Thu, 22 Jun 2023)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp

  Log Message:
  -----------
  [BOLT] Don't register internal func relocs as external references

Currently, all relocations that point inside a function are registered
as external references. If these relocations cannot be resolved as jump
tables or computed gotos, the containing function gets marked as
not-simple and excluded from optimizations.

RISC-V uses relocations for branches and jumps (to support linker
relaxation) and as such, almost no functions get marked as simple. This
patch fixes this by only registering relocations that originate outside
of the referenced function as external references.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D153345


  Commit: 7c2604ca196c3ba0247509c0fde350e23f0cccb0
      https://github.com/llvm/llvm-project/commit/7c2604ca196c3ba0247509c0fde350e23f0cccb0
  Author: Job Noorman <jnoorman at igalia.com>
  Date:   2023-06-22 (Thu, 22 Jun 2023)

  Changed paths:
    A bolt/test/RISCV/internal-func-reloc.s
    A bolt/test/RISCV/reorder-blocks-reverse.s

  Log Message:
  -----------
  [BOLT][RISCV] Add tests for simple CFG transformations

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D153346


Compare: https://github.com/llvm/llvm-project/compare/89f493392d76...7c2604ca196c