[all-commits] [llvm/llvm-project] e7df82: [mlir][sparse] rewrite arith::SelectOp to semiring...

[PeimingLiu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e7df82816b6af3e2929a703718d9ef9dcd55b5f4
      https://github.com/llvm/llvm-project/commit/e7df82816b6af3e2929a703718d9ef9dcd55b5f4
  Author: Peiming Liu <peiming at google.com>
  Date:   2023-06-21 (Wed, 21 Jun 2023)

  Changed paths:
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
    M mlir/test/Dialect/SparseTensor/pre_rewriting.mlir
    A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_semiring_select.mlir

  Log Message:
  -----------
  [mlir][sparse] rewrite arith::SelectOp to semiring operations to sparsify it.

Reviewed By: aartbik, K-Wu

Differential Revision: https://reviews.llvm.org/D153397