[all-commits] [llvm/llvm-project] 80e2c2: RegisterCoalescer: Fix name of pass
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Wed Jun 21 07:31:30 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 80e2c26dfdd2e5ab1bbbf747ebff8c316399653c
https://github.com/llvm/llvm-project/commit/80e2c26dfdd2e5ab1bbbf747ebff8c316399653c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2023-06-21 (Wed, 21 Jun 2023)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
M llvm/test/CodeGen/AArch64/regcoal-physreg.mir
M llvm/test/CodeGen/AArch64/zext-reg-coalesce.mir
M llvm/test/CodeGen/AMDGPU/coalesce-identity-copies-undef-subregs.mir
M llvm/test/CodeGen/AMDGPU/coalesce-into-dead-subreg-copies.mir
M llvm/test/CodeGen/AMDGPU/coalesce-liveout-undef-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
M llvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
M llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-prune-kill-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
M llvm/test/CodeGen/AMDGPU/coalescing-subreg-was-undef-but-became-def.mir
M llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir
M llvm/test/CodeGen/AMDGPU/coalescing_makes_lanes_undef.mir
M llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
M llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
M llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-cannot-join-failures.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
M llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir
M llvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/undef-subreg-use-after-coalesce.mir
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/ARM/no-register-coalescing-in-returnsTwice.mir
M llvm/test/CodeGen/ARM/regcoal-invalid-subrange-update.mir
M llvm/test/CodeGen/Hexagon/regalloc-coal-extend-short-subrange.mir
M llvm/test/CodeGen/Hexagon/regalloc-coal-fullreg-undef.mir
M llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir
M llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/Mips/coalesce-partial-redundant-reguse-terminator.mir
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll
M llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
M llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
M llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
M llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SystemZ/regalloc-GR128-02.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update-remat.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir
M llvm/test/CodeGen/SystemZ/regcoal-undef-lane-4-rm-cp-commuting-def.mir
M llvm/test/CodeGen/SystemZ/subregliveness-06.mir
M llvm/test/CodeGen/SystemZ/subregliveness-07.mir
M llvm/test/CodeGen/WebAssembly/regcoalesce-disable.ll
M llvm/test/CodeGen/X86/adx-commute.mir
M llvm/test/CodeGen/X86/coalesce-dbg-value-subreg-rewrite.mir
M llvm/test/CodeGen/X86/coalesce-dead-lanes.mir
M llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir
M llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
M llvm/test/CodeGen/X86/late-remat-update-2.mir
M llvm/test/CodeGen/X86/late-remat-update.mir
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pre-coalesce.mir
M llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-hoist-copies.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir
M llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir
M llvm/test/DebugInfo/MIR/X86/regcoalescer.mir
M llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
M llvm/test/Other/machine-size-remarks.ll
Log Message:
-----------
RegisterCoalescer: Fix name of pass
I finally snapped and fixed this inconsistency.
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