[all-commits] [llvm/llvm-project] 8b73a2: [LLDB] Add table formatting for register fields

[David Spickett via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8b73a2e8219127b707280b689edb20753849bd4c
      https://github.com/llvm/llvm-project/commit/8b73a2e8219127b707280b689edb20753849bd4c
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2023-06-21 (Wed, 21 Jun 2023)

  Changed paths:
    M lldb/include/lldb/Target/RegisterFlags.h
    M lldb/source/Target/RegisterFlags.cpp
    M lldb/unittests/Target/RegisterFlagsTest.cpp

  Log Message:
  -----------
  [LLDB] Add table formatting for register fields

This will be used by the "register info" command to show
the layout of register contents. For example if we have
these fields coming in from XML:
```
<field name="D" start="0" end="7"/>
<field name="C" start="8" end="15"/>
<field name="B" start="16" end="23"/>
<field name="A" start="24" end="31"/>
```
We get:
```
| 31-24 | 23-16 | 15-8 | 7-0 |
|-------|-------|------|-----|
|   A   |   B   |  C   |  D  |
```
Note that this is only the layout, not the values.
For values, use "register read".

The tables' columns are center padded (left bias
if there's an odd padding) and will wrap if the terminal width
is too low.

```
| 31-24 | 23-16 |
|-------|-------|
|   A   |   B   |

| 15-8 | 7-0 |
|------|-----|
|  C   |  D  |
```

This means we match the horizontal format seen in many architecture
manuals but don't spam the user with lots of misaligned text when the
output gets very long.

Reviewed By: jasonmolenda

Differential Revision: https://reviews.llvm.org/D152917