[all-commits] [llvm/llvm-project] c9e08f: [RISCV] Add a pass to merge moving parameter regis...

[VincentWu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c9e08fa6066649d96cff8c20da42eb0b44dc878b
      https://github.com/llvm/llvm-project/commit/c9e08fa6066649d96cff8c20da42eb0b44dc878b
  Author: WuXinlong <821408745 at qq.com>
  Date:   2023-06-21 (Wed, 21 Jun 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    A llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    A llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll

  Log Message:
  -----------
  [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp

This patch adds a pass to generate `cm.mvsa01` & `cm.mva01s`.

RISCVMoveOptimizer.cpp which combines two mv inst into one cm.mva01s or cm.mva01s.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D150415