[all-commits] [llvm/llvm-project] ab927a: [AMDGPU] Fix operand class of v_ldexp_f16 src1

[Joe Nash via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ab927a998397c30fd3426d9aa1e071206fa554b2
      https://github.com/llvm/llvm-project/commit/ab927a998397c30fd3426d9aa1e071206fa554b2
  Author: Joe Nash <Joseph.Nash at amd.com>
  Date:   2023-06-19 (Mon, 19 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
    M llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
    M llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt

  Log Message:
  -----------
  [AMDGPU] Fix operand class of v_ldexp_f16 src1

Patch eece6ba283bd changed the src1 type of v_ldexp_f16 from i32 to
i16. Though semantically src1 is an i16, the hardware reads this operand as an
f16 type, which primarily enables floating point inline constants.
Therefore this patch changes the operand type to f16. It maintains the
current behavior where floating point source modifiers are not allowed
on src1. SDWA sext modifier continues to be allowed.
The test asm and disasm test changes in eece6ba283bd are reverted,
because the floating point inline constants are allowed.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D153169