[all-commits] [llvm/llvm-project] 1826c7: [mlir][transform] SequenceOp: Top-level operations...

[Matthias Springer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1826c728cf149ec2782df3c88960601ff214d4fd
      https://github.com/llvm/llvm-project/commit/1826c728cf149ec2782df3c88960601ff214d4fd
  Author: Matthias Springer <me at m-sp.org>
  Date:   2023-06-19 (Mon, 19 Jun 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
    M mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp
    M mlir/test/Dialect/Tensor/fold-empty-op.mlir
    M mlir/test/Dialect/Tensor/rewrite-as-constant.mlir
    M mlir/test/Dialect/Vector/vector-contract-matvec-transforms.mlir
    M mlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
    M mlir/test/Dialect/Vector/vector-multi-reduction-outer-lowering.mlir
    M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
    M mlir/test/Dialect/Vector/vector-transfer-full-partial-split-copy-transform.mlir
    M mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
    M mlir/test/Dialect/Vector/vector-transfer-tensor-slice-transforms.mlir
    M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
    M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/test-shuffle16x16.mlir

  Log Message:
  -----------
  [mlir][transform] SequenceOp: Top-level operations can be used as matchers

As a convenience to the user, top-level sequence ops can optionally be used as matchers: the op type is specified by the type of the block argument.

This is similar to how pass pipeline targets can be specified on the command line (`-pass-pipeline='builtin.module(func.func(...))`).

Differential Revision: https://reviews.llvm.org/D153121