[all-commits] [llvm/llvm-project] 68f34e: [AArch64] Add tablegen patterns for faddp of two e...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 68f34e4d39690cb22f11269a128cae420feaf212
      https://github.com/llvm/llvm-project/commit/68f34e4d39690cb22f11269a128cae420feaf212
  Author: David Green <david.green at arm.com>
  Date:   2023-06-19 (Mon, 19 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/faddp.ll

  Log Message:
  -----------
  [AArch64] Add tablegen patterns for faddp of two extracts

This adds some simple tablegen patterns for converting
`faddp v2f32 extractlow(Rn), v2f32 extracthigh(Rn)` to
`faddp v4f32 Rn, v4f32 Rn` using the q variants of the
instructions, avoiding the extra ext needed to extract
the high lanes. Only the bottom lanes of the new faddp
are used, the second Rn operand is used as a placeholder.
It uses Rn to prevent any false dependencies, but could
equally by undef.

Differential Revision: https://reviews.llvm.org/D152245