[all-commits] [llvm/llvm-project] 7a8f6a: Increase test coverage of Transforms/InstCombine/A...

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7a8f6a3eaac751ca0852fdd488826c0c0bb295d0
      https://github.com/llvm/llvm-project/commit/7a8f6a3eaac751ca0852fdd488826c0c0bb295d0
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2023-06-18 (Sun, 18 Jun 2023)

  Changed paths:
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll

  Log Message:
  -----------
  Increase test coverage of Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll


  Commit: c7c71aa123fdeb520b419ac7daca239902a792ac
      https://github.com/llvm/llvm-project/commit/c7c71aa123fdeb520b419ac7daca239902a792ac
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2023-06-18 (Sun, 18 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

  Log Message:
  -----------
  [NFC][AArch64TTI] Breakout add/sub combines into discrete functions.


  Commit: b7287a82d33b6cd1760ac7e399ba92ae52057b5d
      https://github.com/llvm/llvm-project/commit/b7287a82d33b6cd1760ac7e399ba92ae52057b5d
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2023-06-18 (Sun, 18 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll

  Log Message:
  -----------
  [SVE][AArch64TTI] Fix invalid mla combine that miscomputes the value of inactive lanes.

Consider: add(pg, a, mul_u(pg, b, c))

Although the multiply's inactive lanes are undefined, they don't
contribute to the final result.  The overall result of the inactive
lanes come from "a" and thus the above is another form of mla
rather than mla_u.


Compare: https://github.com/llvm/llvm-project/compare/82d4dc20efbd...b7287a82d33b