[all-commits] [llvm/llvm-project] 56c255: [1/3][RISCV] Define machine instruction to write a...

[Yueh-Ting (eop) Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 56c25575ce7434e63b5b52351e5072566250018b
      https://github.com/llvm/llvm-project/commit/56c25575ce7434e63b5b52351e5072566250018b
  Author: eopXD <yueh.ting.chen at gmail.com>
  Date:   2023-06-15 (Thu, 15 Jun 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVSystemOperands.td
    A llvm/test/CodeGen/RISCV/rvv/vxrm.mir

  Log Message:
  -----------
  [1/3][RISCV] Define machine instruction to write an immediate into vxrm

This patch-set wants to model rounding mode for the fixed-point
intrinsics of the RVV C intrinsics.

The specification PR: [riscv-non-isa/rvv-intrinsic-doc#222](https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222)

The 3 patches is a proof-of-concept with a bottom-up approach
Going from machine instruction to LLVM intrinsics, then to the C
intrinsics. The 3 patches applies the rounding mode control on the
`vaadd` instruction. Proceeding patches will extend the change to all
other fixed-point computations.

---

This is the 1st commit of the patch-set.  This patch gives a name to
the machine instruction that writes an immediate into the CSR `vxrm`.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D151395