[all-commits] [llvm/llvm-project] d0c083: [AMDGPU] Remove return VGPRs from callee save list

[Carl Ritson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d0c083870538a4155986fe29dc164e49bce37820
      https://github.com/llvm/llvm-project/commit/d0c083870538a4155986fe29dc164e49bce37820
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2023-06-15 (Thu, 15 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll

  Log Message:
  -----------
  [AMDGPU] Remove return VGPRs from callee save list

There is no need to generate spill/restore for registers used in
return value.  This matters for amdgpu_gfx calling convention
where CSR and Ret definitions overlap.

Reviewed By: sebastian-ne

Differential Revision: https://reviews.llvm.org/D152892


  Commit: 0fd31b2880b32113e3218f14d8e7ae651187a55d
      https://github.com/llvm/llvm-project/commit/0fd31b2880b32113e3218f14d8e7ae651187a55d
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2023-06-15 (Thu, 15 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll

  Log Message:
  -----------
  [AMDGPU] Place returns on stack if they would violate VGPR limit

Check no VGPRs above configured maximum would be used by a return
when deciding if it can be lowered.

Reviewed By: sebastian-ne

Differential Revision: https://reviews.llvm.org/D152912


Compare: https://github.com/llvm/llvm-project/compare/03d64acd4e21...0fd31b2880b3