[all-commits] [llvm/llvm-project] fd68d3: [mlir][sparse] unifying enterLoopOverTensorAtLvl a...

[PeimingLiu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fd68d36109c6fcebb6d758046b88b0664acccf51
      https://github.com/llvm/llvm-project/commit/fd68d36109c6fcebb6d758046b88b0664acccf51
  Author: Peiming Liu <peiming at google.com>
  Date:   2023-06-14 (Wed, 14 Jun 2023)

  Changed paths:
    M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
    M mlir/test/Dialect/SparseTensor/sorted_coo.mlir

  Log Message:
  -----------
  [mlir][sparse] unifying enterLoopOverTensorAtLvl and enterCoIterationOverTensorsAtLvls

The tensor levels are now explicitly categorized into different `LoopCondKind` to instruct LoopEmitter generate different code for different kinds of condition (e.g., `SparseCond`, `SparseSliceCond`, `SparseAffineIdxCond`, etc)

The process of generating a while loop is now dissembled into three steps and they are dispatched to different LoopCondKind handler.
1. Generate LoopCondition (e.g., `pos <= posHi` for `SparseCond`, `slice.isNonEmpty` for `SparseAffineIdxCond`)
2. Generate LoopBody (e.g., compute the coordinates)
3. Generate ExtraChecks (e.g., `if (onSlice(crd))` for `SparseSliceCond`)

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D152464