[all-commits] [llvm/llvm-project] 6bf79f: [SelectionDAG][RISCV] Add very basic PromoteIntege...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6bf79fb09416b02b3f8589a4998610d70c185dae
      https://github.com/llvm/llvm-project/commit/6bf79fb09416b02b3f8589a4998610d70c185dae
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-06-14 (Wed, 14 Jun 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp.ll

  Log Message:
  -----------
  [SelectionDAG][RISCV] Add very basic PromoteIntegerResult/Op support for VP_SIGN/ZERO_EXTEND.

We don't have VP_ANY_EXTEND or VP_SIGN_EXTEND_INREG yet so I've
deviated a little from the non-VP lowering.

My goal was to fix the crashes that occurs on these test cases without this patch.

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D152854